Digital cameras and other image processing devices are being used nowadays ubiquitously throughout the world. Their popularity mainly stems from their relatively small size and low cost, which are due to the enabling technology.
A digital camera module usually comprises a sensor for acquiring the raw information, an image signal processing (ISP) unit for converting the raw signal into RGB pixel information ready to be displayed or compressed, and optionally a processing engine such as a compression engine for example to Joint Photographic Experts Group (JPEG) format. The sensor is preferably arranged in a matrix-like structure comprising lines and columns of sensor units. In common implementations the ISP unit and processing engine comprise a memory unit that stores the image part which undergoes processing, and a processing unit.
Modern devices store and use up to the last nine or more lines acquired by the sensor, referred to as delay lines, for providing the ISP with the image part for processing, and up to seven or more delay lines for providing the information for JPEG or any other compression engines. Since the image sizes keep increasing, in order to supply the required information to the engines, the memory requirements increase as well. This leads to a situation in which the memory unit constitutes a significant part of the camera module or other image processing engine, and induces increased size and cost.
Some methods exist for reducing the amount of on-chip memory used for the ISP and JPEG engines. One common method is to store the original image in an external memory unit and process the image in thin vertical stripes, for example 256 pixels wide, in order to decrease the length of on-chip delay lines. Thus delay lines constituting of 256 pixels are used and considerable amount of internal memory might be saved. However, this method has at least two limitations. The first limitation is that large external memory unit and memory bandwidth are not always available. Second, writing to and reading from the external memory require additional time, and significantly increase the minimal possible time between taken consecutive images. The time is further increased, since the memory has to be read twice, once for the ISP processing and once for the JPEG compression, if the internal delay lines are to be saved for JPEG compression after being processed.
Thus there is a need in the art for a method and apparatus for avoiding the usage of memory for storing delay lines, and thus minimize on-chip memory requirements. The method and apparatus should enable efficient processing of the raw information as captured by the sensor while avoiding the usage of an external memory unit for storing the information, and avoid increase in the size or price of the camera or other image processing device.